The present invention relates generally to thin film silicon-on-insulator-on metal electronic circuitry, and more particularly, to thin film transistor electronics fabricated in a silicon film on a refractory insulator film adhered to a refractory metal sheet and additionally wherein the insulator is generated by thermal fusion of refractory insulator particles deposited as a coating on the refractory metal sheet and also wherein the silicon film is generated by the fusing and crystallization of silicon particles deposited as a coating on the insulator film.
In a first approach a xerographic type system is utilized to deposit an image of fine fused silica glass particles onto the refractory metal. These glass particles are then fused into a homogeneous fire polished film by an infrared laser. A second approach utilizes ink jet printing technology to deposit an image of fine fused silica glass particles onto the refractory metal sheet. A subsequent imaging process deposits fine particles of electronic grade silicon on the glass film. The silicon is then fused and crystallized into electronically useful silicon by means of a scanning infrared laser. Subsequent processing, common to VLSI circuit fabrication, then generates the desired electronic circuitry within and upon the surface of the silicon. A dielectric overcoat on top of the processed silicon then provides physical protection and also serves as a substrate for interconnections. Other approaches for the deposition of an image of particulate material include offset printing and screen-printing.
Alternate and optional refractory insulator materials include other glasses, including borosilicate glass (i.e. PYREX), mixed particles of various glasses, and also sapphire. Alternate and optional refractory metals include tantalum and titanium.
One particular benefit of the fabrication technique of the present invention is that it provides for the stacking of many thin circuit layers to comprise an affective three-dimensional VLSI integrated circuits. The metal sheet in each stack serve the additional function of efficiently conducting waste heat into a heat sink.
A further benefit of the invention is that it provides for the deposition of the insulator and silicon in patterns in accordance with a predetermined image and the subsequent fabrication of silicon electronics in the patterns. As an example the pattern can comprise a plurality of patches over a large area metal sheet. By this means electronic circuitry can be fabricated over an extended area using only modest amounts of insulator and silicon, the insulator and silicon being positioned just where electronics are required. Sizes of patches can be kept small expanding the range of acceptable materials having different thermal expansion characteristics. Circuits having mechanical flexibility can be provided since the rigid patches of glass and silicon will be separated and surrounded by flexible metal sheet which can optionally, be comprised of very thin foil.
Fused silica glass and sapphire have commonly been the materials of choice for the insulator in silicon-on-insulator applications. These materials exhibit thermal characteristics which are superior to those of ordinary glasses and which are compatible with silicon, allowing deposited or grown silicon to be recrystallized at high temperatures whereby the resulting forms of silicon exhibit superior performance. The relative high cost of bulk fused silica or sapphire in prefabricated substrates, however, limits the use of these materials to all but very special applications. In the present invention desired circuit functions is achieved without the need of a separate insulator substrate. The insulator is generated in situ from particulate material as an integral part of the process. The need to pre-fabricate a refractory insulator substrate is eliminated and a cost benefit achieved. Similarly, the silicon on the insulator is generated in situ from particulate silicon and then only at positions of actual need.
In the approach of the present invention a number of advantages are exhibited over conventional fabrication of silicon-on-insulator. (I) For a given application, the total bulk of the insulator and the silicon are reduced, these materials being utilized in thin films and then only at specific locations where electronics are desired. (II) The need is eliminated to prefabricate a high quality insulator or window upon which thin-film-transistor (TFT) electronics are subsequently fabricated for certain applications. (III) Epitaxial growth of amorphous silicon on an insulator is a very slow process and constitutes a production bottleneck in many important cases. This slow growth process is eliminated in the present invention. (IV) The net thickness of a module incorporating TFT electronics on silicon-on-insulator on a refractory metal sheet is greatly reduced over that other of methods of fabricating silicon-on-insulator electronics. A direct benefit of this feature is that a plurality of circuit modules can be assembled into a stack comprising a three-dimensional VLSI integrated circuit thereby providing an increase in circuit packing density with its consequent increase in functionality and speed. The metal sheet provides an efficient thermal path for cooling which further facilitates high circuit density and high functionality. (V) Computer or television displays are typically several inches or a few tens of inches in extent. In the application of the present invention to TFT electronics for these displays the total amount of active silicon can actually be quite small even though there may be a million or more transistors in the display. Some VLSI circuits contain this many transistors in only a few centimeters. The displays need only a limited amount of silicon but in prior art approaches typically much more silicon is actually utilized since the silicon must cover the extent of the display. In the case of the present invention silicon need not be continuous over the entire display but just the needed silicon can be placed in small patches at specific locations of need. As a result materials utilization efficiency is significantly enhanced.
Fused Silica exhibits the highest melting point of any known glass, 1600.degree. C. Fused Quartz has a slightly higher melting point, 1730.degree. C. but is not a true glass, and is in limited supply. Sapphire melts at about 2040.degree. C. Both Tungsten and Tantalum exhibit melting points well in excess of these values: Tungsten at 3410.degree. C. and Tantalum at 2996.degree. C. Thermal expansion coefficients of these materials are similar: Fused Silica or fused Quartz at 0.6.times.10.sup.-6 /.degree. C.; Tungsten at 2.times.10.sup.-6 /.degree. C.; Silicon at 2.33.times.10.sup.-6 /.degree. C.; Tantalum at 3.times.10.sup.-6 /.degree. C.; PYREX at 3.25.times.10.sup.-6 /.degree. C.; and Sapphire at 7.7.times.10.sup.-6 /.degree. C. Because of their thermal compatibility Tungsten along with Fused Silica is commonly utilized in glass-to-metal seals. Fused silica has a working temperature around 900.degree. C. and is commonly annealed at 1120.degree. C. Each of the discussed insulators is a high absorber of infrared optical energy and is readily melted at the wavelength of the CO.sub.2 laser, 10.6 microns. The utilization of this laser at carefully controlled power and energy levels, optionally scanned over the surface allows melting and fusing of fused silica particles into a thin film insulator on the tungsten sheet with minimum effect on the underlying tungsten.
By a similar laser process a coating of particulate silicon on the resulting insulator can be fused and crystallized with negligible adverse effect on the underlying substrates. Surface tension of the glass melt, or crystallization in the case of Sapphire, will assure a smooth insulator surface for the deposition of silicon. Thermal expansion characteristics of the materials being considered are small and are similar. Such differences that do exist can, however, be accommodated by utilizing the silicon and insulator in a plurality of patches on the refractory metal sheet. By this means stress and strain associated with thermal expansion differences will be restricted to acceptably small regions.
Silicon exhibits a melting point of about 1412.degree. C., and is commonly annealed at from 500.degree. C. to 700.degree. C. Silicon has a strong optical absorption in the far infrared, commencing at just the CO2 wavelength and extending into the longer wavelengths. A scanning CO2 laser will melt the silicon particles, forming a melt pool which will follows the scanning laser beam. The silicon will then crystallize from the moving melt pool as it cools. This process is not unlike the zone refining of silicon utilized in some silicon production processes. Optical power and energy provided by said scanning laser beam along with scan parameters are readily adjustable to just those values needed to melt and crystallize the silicon with minimum adverse effect on the underlying insulator film and metal sheet. By the means of a scanning infrared laser, such as the CO2 laser, the silicon particles are fused and crystallized into electronic quality silicon, care being taken to exclude oxygen, nitrogen and any other material which would degrade the silicon.
It is an object of this invention to provide silicon-on-insulator electronics on a refractory metal sheet. It is a further object of this invention to provide silicon-on-insulator electronics in a format whereby much the bulk of the silicon and the insulator is eliminated and whereby the need of a prefabricated insulator substrate is eliminated. It is a further object of this invention to provide electronic circuitry in thin format modules whereby a plurality of modules can be stacked to comprise a three-dimensional VLSI integrated circuit and whereby the metal sheet integral to each module facilitates waste heat removal. It is still another object of this invention to provide patches of silicon-on-insulator electronic circuitry distributed over an extended area wherein the silicon and the insulator are patterned and located only at just those specific positions where electronic circuitry is actually required, thereby achieving an economy of costly materials. It is yet another object of this invention to provide a plurality of patches of thin film transistor electronics on flexible metal foil whereby mechanical flexibility of the array is achieved. It is yet a further object of this invention to provide silicon-on-insulator electronics in a pattern as determined by a stored image. It is yet another object of this invention to provide a process for the fabrication of silicon-on-insulator integrated circuits whereby a glass or other insulator substrate is developed in situ as part of the fabrication process, and need not be supplied as a separate prefabricated substrate. It is still another object of this invention to provide a process for the generation of a silicon thin film on a refractory insulator by means other than epitaxial growth.
Other objects and attainments together with a fuller understanding of the invention will become apparent and appreciated by referring to the following descriptions and claims in conjunction with the accompanying drawings.